1st Edition

Low-Power NoC for High-Performance SoC Design

By Hoi-Jun Yoo, Kangmin Lee, Jun Kyong Kim Copyright 2008
300 Pages 270 B/W Illustrations
by CRC Press

300 Pages 270 B/W Illustrations
by CRC Press

Chip Design and Implementation from a Practical Viewpoint Focusing on chip implementation, Low-Power NoC for High-Performance SoC Design provides practical knowledge and real examples of how to use network on chip (NoC) in the design of system on chip (SoC). It discusses many architectural and theoretical studies on NoCs, including design methodology, topology exploration, quality-of-service... Read more
Preface NoC-Based System-Level Design
NoC and System-Level Design
Introduction to SoC Design
Platform-Based SoC Design
Multiprocessor SoC and NoC
Low-Power SoC Design
System Design with Model of Computation
System Models
Validation and Verification
Hardware/Software Codesign
Codesign
Application Analysis
Synthesis
Computation–Communication Partitioning
Communication System: Current Trend
Separation of Communication and Computation
Communication-Centric SoC Design
Communication Synthesis
Network-Based Design
NoC-Based real Chip Implementation
NoC-Based SoC
NoC
Architecture of NoC
Practical Design of NoC
NoC Topology and Protocol Design
Introduction
Analysis Methodology
Energy Exploration
NoC Protocol Design
Summary
Low Power Design for NoC
Introduction
Low-Power Signaling
On-Chip Serialization
Low-Power Clocking
Low-Power Channel Coding
Low-Power Switch
Low-Power NoC Protocol
Real Chip Implementation
Introduction
BONE Series
Industrial Implementations
Academic Implementations
Appendix: BONE Protocol Specification
Overview of BONE
BONE Protocol
Index
References appear at the end of each chapter.

Biography

Hoi-Jun Yoo, Kangmin Lee, Jun Kyong Kim