1st Edition

Autonomic Networking-on-Chip Bio-Inspired Specification, Development, and Verification

Edited By Phan Cong-Vinh Copyright 2012
    287 Pages 68 B/W Illustrations
    by CRC Press

    288 Pages 68 B/W Illustrations
    by CRC Press

    Despite the growing mainstream importance and unique advantages of autonomic networking-on-chip (ANoC) technology, Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification is among the first books to evaluate research results on formalizing this emerging NoC paradigm, which was inspired by the human nervous system.

    The FIRST Book to Assess Research Results, Opportunities, & Trends in "BioChipNets"

    The third book in the Embedded Multi-Core Systems series from CRC Press, this is an advanced technical guide and reference composed of contributions from prominent researchers in industry and academia around the world. A response to the critical need for a global information exchange and dialogue, it is written for engineers, scientists, practitioners, and other researchers who have a basic understanding of NoC and are now ready to learn how to specify, develop, and verify ANoC using rigorous approaches.

    Offers Expert Insights Into Technical Topics Including:

    • Bio-inspired NoC
    • How to map applications onto ANoC
    • ANoC for FPGAs and structured ASICs
    • Methods to apply formal methods in ANoC development
    • Ways to formalize languages that enable ANoC
    • Methods to validate and verify techniques for ANoC
    • Use of "self-" processes in ANoC (self-organization, configuration, healing, optimization, protection, etc.)
    • Use of calculi for reasoning about context awareness and programming models in ANoC

    With illustrative figures to simplify contents and enhance understanding, this resource contains original, peer-reviewed chapters reporting on new developments and opportunities, emerging trends, and open research problems of interest to both the autonomic computing and network-on-chip communities. Coverage includes state-of-the-art ANoC architectures, protocols, technologies, and applications. This volume thoroughly explores the theory behind ANoC to illustrate strategies that enable readers to use formal ANoC methods yet still make sound judgments and allow for reasonable justifications in practice.

    A Bio-Inspired Architecture for Autonomic Network-on-Chip, M. Bakhouya

    Infrastructure level

    Communication level

    Application level

    BNoC Architecture


    Bio-Inspired NoC Architecture Optimization, A.A. Morgan, H. Elmiligi, M.W. El-Kharashi, and F. Gebali

    Related work

    Bio-inspired optimization techniques

    Graph theory representation of NoC applications

    Problem formulation

    Custom architecture generation using GA

    Experimental results


    An Autonomic NoC Architecture Using Heuristic Technique for Virtual-Channel Sharing, K. Latif, A. M. Rahmani, T. Seceleanu, and H. Tenhunen


    Resource utilization analysis

    The proposed router architecture: PVS-NoC

    Experimental results



    Evolutionary Design of Collective Communications on Wormhole NoCs, J. Jaros and V. Dvorak

    Collective communications


    Evolutionary design of collective communications

    Optimization tools and parameters adjustments

    Experimental results of the quest for high-quality schedules


    Formal Aspects of Parallel Processing on Bio-Inspired on-Chip Networks, P.C. Vinh


    Related work

    Basic concepts

    Processing BioChipNet tasks

    Processing BioChipNet data

    Notes and remarks


    HAMSoC: A Monitoring-Centric Design Approach for Adaptive Parallel Computing, L. Guang, J. Plosila, J. Isoaho, and H. Tenhunen

    Hierarchical agent monitoring design approach

    Formal specification of HAMSoC

    Design example: hierarchical power monitoring in HAMNoC



    Toward Self-Placing Applications on 2D and 3D NoCs, L. Petre, K. Sere, L. Tsiopoulos, P. Liljeberg, and J. Plosila

    Related work

    NoC-oriented MIDAS

    Placing and replacing resources


    Self-Adaption in SoCs, H. Zakaria, E. Yahya, and L. Fesquet

    Power management techniques

    Controlling uncertainty and handling process variability

    Data synchronization in GALS system






    Phan Cong-Vinh received a Ph.D in computer science from London South Bank University (LSBU) in the United Kingdom, a BS in mathematics and an MS in computer science from Vietnam National University (VNU) in Ho Chi Minh City, and a BA in English from Hanoi University of Foreign Languages Studies in Vietnam. He finished his PhD dissertation with the title Formal Aspects of Dynamic Reconfigurability in Reconfigurable Computing Systems supervised by Prof. Jonathan P. Bowen at LSBU where he was affiliated with the Centre for Applied Formal Methods (CAFM) at the Institute for Computing Research (ICR). From 1983 to 2000, he was a lecturer in mathematics and computer science at VNU, Posts and Telecommunications Institute of Technology (PTIT) and several other universities in Vietnam before he joined research with Dr. Tomasz Janowski at the International Institute for Software Technology (IIST) in Macao SAR, China, as a fellow in 2000. His research interests center on all aspects of formal methods, autonomic computing and networking, reconfigurable computing, ubiquitous computing, and applied categorical structures in computer science.