324 pages | 125 B/W Illus.
Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity.
Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and systems, application of novel materials for 3D systems, and the thermal challenges to restrict power dissipation and improve performance of 3D systems. Containing contributions from experts in industry as well as academia, this authoritative text:
Complete with experimental results of chip-level 3D integration schemes tested at IBM and case studies on advanced complementary metal–oxide–semiconductor (CMOS) integration for 3D integrated circuits (ICs), Design of 3D Integrated Circuits and Systems is a practical reference thatnot only covers a wealth of design issues encountered in 3D integration but also demonstrates their impact on the efficiency of 3D systems.
About the Editors
3D Integration Technology with TSV and IMC Bonding; Katsuyuki Sakuma
Wafer-Level Three-Dimensional ICs for Advanced CMOS Integration; Ronald J. Gutmann and Jian-Qiang Lu
Integration of Graphics Processing Cores with Microprocessors; Deepak C. Sekar and Chinnakrishnan Ballapuram
Electrothermal Simulation of Three-Dimensional Integrated Circuits; Shivam Priyadarshi, Jianchen Hu, Michael B. Steer, Paul D. Franzon, and W. Rhett Davis
Thermal Management in 3D ICs/Systems; Francesco Zanini
Emerging Interconnect Technologies for 3D Networks-on-Chip; Rohit Sharma and Kiyoung Choi
Inductive-Coupling ThruChip Interface for 3D Integration; Noriyuki Miura and Tadahiro Kuroda
Fabrication and Modeling of Copper and Carbon Nanotube-Based Through-Silicon Via; Brajesh Kumar Kaushik, Manoj Kumar Majumder, and Archana Kumari
Low-Power Testing for 2D/3D Devices and Systems; Xijiang Lin, Xiaoqing Wen, and Dong Xiang