Nanoscale Devices: Physics, Modeling, and Their Application, 1st Edition (Hardback) book cover

Nanoscale Devices

Physics, Modeling, and Their Application, 1st Edition

By Brajesh Kumar Kaushik

CRC Press

432 pages | 40 Color Illus. | 258 B/W Illus.

Outstanding Digital Product 2018
Purchasing Options:$ = USD
Hardback: 9781138060340
pub: 2018-11-28
SAVE ~$31.99
$159.95
$127.96
x
eBook (VitalSource) : 9781315163116
pub: 2018-11-16
from $28.98


FREE Standard Shipping!

Description

The primary aim of this book is to discuss various aspects of nanoscale device design and their applications including transport mechanism, modeling, and circuit applications. .

Provides a platform for modeling and analysis of state-of-the-art devices in nanoscale regime, reviews issues related to optimizing the sub-nanometer device performance and addresses simulation aspect and/or fabrication process of devices

Also, includes design problems at the end of each chapter

Table of Contents

Section I Nanoscale Transistors

1. Simulation of Nanoscale Transistors from Quantum and Multiphysics

Perspective

[Zhipeng Dong, Wenchao Chen, Wen-Yan Yin, and Jing Guo]

2. Variability in Nanoscale Technology and EδDC MOS Transistor

[Sarmista Sengupta and Soumya Pandit]

3. Effect of Ground Plane and Strained Silicon on Nanoscale FET Devices

[Saurabh Chaudhury and Avtar Singh]

Section II Novel MOSFET Structures

4. U-Shaped Gate Trench Metal Oxide Semiconductor Field Effect Transistor:

Structures and Characteristics

[Deepshikha Bharti and Aminul Islam]

5. Operational Characteristics of Vertically Diffused Metal Oxide

Semiconductor Field Effect Transistor

[Deepshikha Bharti and Aminul Islam]

6. Modeling of Double-Gate MOSFETs

[D. Nirmal and J. Ajayan]

Section III Modeling of Tunnel FETs

7. TFETs for Analog Applications

[Marcio Dalla Valle Martino, Paula Ghedini Der Agopian, Joao Antonio Martino,

Eddy Simoen, and Cor Claeys]

8. Dual Metal–Double Gate Doping-Less TFET: Design and Investigations

[Ramandeep Kaur, Rohit Dhiman, and Rajeevan Chandel]

Section IV Graphene and Carbon Nanotube Transistors

and Applications

9. Modeling of Graphene Plasmonic Terahertz Devices

[Neetu Joshi and Nagendra P. Pathak]

10. Analysis of CNTFET for SRAM Cell Design

[Shashi Bala and Mamta Khosla]

11. Design of Ternary Logic Circuits Using CNFETs

[Chetan Vudadha and M. B. Srinivas]

Section V Modeling of Emerging Non-Silicon Transistors

12. Different Analytical Models for Organic Thin-Film Transistors: Overview

and Outlook

[W. Boukhili and R. Bourguiga]

13. A Fundamental Overview of High Electron Mobility Transistor

and Its Applications

[D. Nirmal and J. Ajayan]

Section VI Emerging Nonvolatile Memory Devices

and Applications

14. Spintronic-Based Memory and Logic Devices

[Jyotirmoy Chatterjee, Pankaj Sethi, and Chandrasekhar Murapaka]

15. Fundamentals, Modeling, and Application of Magnetic Tunnel Junctions

[Ramtin Zand, Arman Roohi, and Ronald F. DeMara]

16. RRAM Devices: Underlying Physics, SPICE Modeling, and Circuit

Applications

[Firas Odai Hatem, T. Nandha Kumar, and Haider A. F. Almurib]

17. Evaluation of Nanoscale Memristor Device for Analog and Digital

Application

[Jeetendra Singh and Balwinder Raj]

Section I Nanoscale Transistors

Chapter 1: Simulation of Nanoscale Transistors from Quantum and Multiphysics Perspective

Zhipeng Dong, Wenchao Chen, Wen-Yan Yin, and Jing Guo

 

Chapter 2: Variability in Nanoscale Technology and EδDC MOS Transistor

Sarmista Sengupta and Soumya Pandit

 

Chapter 3: Effect of Ground Plane and Strained Silicon on Nano-scale FET Devices

Saurabh Chaudhury and Avtar Sing

 

Section II Novel MOSFET Structures

Chapter 4: U-shaped Gate Trench Metal Oxide Semiconductor Field Effect Transistor: Structures and Characteristics

Deepshikha Bharti and Aminul Islam

 

Chapter 5: Operational Characteristics of Vertically Diffused Metal Oxide Semiconductor Field Effect Transistor

Deepshikha Bharti and Aminul Islam

 

Chapter 6: Modeling of Double Gate MOSFETs

D.Nirmal and J.Ajayan

Section III Modeling of Tunnel FETs

Chapter 7: TFETs for analog applications.

M.D.V. Martino, P.G.D. Agopian, J.A. Martino, E. Simoen and C. Claeys

 

Chapter 8: Dual Metal–Double Gate Doping Less TFET: Design and Investigations

Ramandeep Kaur, Rohit Dhiman and Rajeevan Chandel

Section IV Graphene and Carbon Nanotube Transistors and Applications

Chapter 9: Modeling of Graphene plasmonic terahertz devices

Neetu Joshi and Nagendra P. Pathak

 

Chapter 10: Analysis of CNTFET for SRAM Cell Design

Shashi Bala and Mamta Khosla

 

Chapter 11: Design of Ternary Logic Circuits Using CNFETs

Chetan Vudadha and M.B.Srinivas

 

Section V Modeling of Emerging Non-Silicon Transistors

Chapter 12: Different analytical models for organic thin film transistors: overview and outlook

W. Boukhili and R. Bourguiga

Chapter 13: A Fundamental Overview of High Electron Mobility Transistor and its Applications

D.Nirmal and J.Ajayan

Section VI Emerging Non-Volatile Memory Devices and Applications

Chapter 14: Spintronic based memory and logic devices

Jyotirmoy Chatterjee, Pankaj Sethi and Chandrasekhar Murapaka

 

Chapter 15: Fundamentals, Modeling and Application of Magnetic Tunnel Junctions

Ramtin Zand, Arman Roohi and Ronald F. DeMara

 

Chapter 16: RRAM Devices: Underlying Physics, SPICE Modelling and Circuit Applications

Firas Odai Hatem, T. Nandha Kumar and Haider A. F. Almurib

 

Chapter 17: Evaluation of Nanoscale Memristor Device for Analog and Digital Application

Jeetendra Singh, and Balwinder Raj

About the Author

Brajesh Kumar Kaushik received Doctorate of Philosophy (Ph.D.) in 2007 from Indian Institute of Technology, Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been an Associate Professor. He has served as General Chair, Technical Chair, and Keynote Speaker of many reputed international and national conferences. Dr. Kaushik is a Senior Member of IEEE and member of many expert committees constituted by government and non-government organizations. He is Editor of IEEE Transactions on Electron Devices; Associate Editor of IET Circuits, Devices & Systems; Editor of Microelectronics Journal, Elsevier; Editor of Journal of Electrical and Electronics Engineering Research, Academic Journals; and Editorial board member of Journal of Engineering, Design and Technology, Emerald. He also holds the position of Editor-in-Chief of International Journal of VLSI Design & Communication Systems, and SciFed Journal of Spintronics & Quantum Electronics. He has received many awards and recognitions from the International Biographical Center (IBC), Cambridge. His name has been listed in Marquis Who’s Who in Science and Engineering® and Marquis Who’s Who in the World®. Dr. Kaushik has been conferred with Distinguished Lecturer award of IEEE Electron Devices Society (EDS) to offer EDS Chapters with quality lectures in his research domain. His research interests are in the areas of high-speed interconnects, low-power VLSI design, memory design, carbon nanotube-based designs, organic electronics, FinFET device circuit co-design, electronic design automation (EDA), spintronics-based devices, circuits and computing, image processing, and optics & photonics based devices.

Subject Categories

BISAC Subject Codes/Headings:
SCI055000
SCIENCE / Physics
TEC008070
TECHNOLOGY & ENGINEERING / Electronics / Microelectronics
TEC027000
TECHNOLOGY & ENGINEERING / Nanotechnology & MEMS