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Strained-Si Heterostructure Field Effect Devices




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ISBN 9780750309936
Published January 11, 2007 by CRC Press
436 Pages - 299 B/W Illustrations

 
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Book Description

A combination of the materials science, manufacturing processes, and pioneering research and developments of SiGe and strained-Si have offered an unprecedented high level of performance enhancement at low manufacturing costs. Encompassing all of these areas, Strained-Si Heterostructure Field Effect Devices addresses the research needs associated with the front-end aspects of extending CMOS technology via strain engineering. The book provides the basis to compare existing technologies with the future technological directions of silicon heterostructure CMOS.

After an introduction to the material, subsequent chapters focus on microelectronics, engineered substrates, MOSFETs, and hetero-FETs. Each chapter presents recent research findings, industrial devices and circuits, numerous tables and figures, important references, and, where applicable, computer simulations. Topics covered include applications of strained-Si films in SiGe-based CMOS technology, electronic properties of biaxial strained-Si films, and the developments of the gate dielectric formation on strained-Si/SiGe heterolayers. The book also describes silicon hetero-FETs in SiGe and SiGeC material systems, MOSFET performance enhancement, and process-induced stress simulation in MOSFETs.

From substrate materials and electronic properties to strained-Si/SiGe process technology and devices, the diversity of R&D activities and results presented in this book will no doubt spark further development in the field.

Table of Contents

INTRODUCTION
Heterostructure Field-Effect Devices
Substrate Engineering
Gate Dielectrics on Engineered Substrates
Strained-Si Technology: Process Integration
Nonclassical CMOS Structures
Strain-Engineered Hetero-FETs: Modeling and Simulation

STRAIN ENGINEERING IN MICROELECTRONICS
Stress Induced during Manufacturing
Global vs. Local Strain
Substrate-Induced Strain
Process-Induced Stress
Stress/Strain Analysis

STRAIN-ENGINEERED SUBSTRATES
Epitaxy
Heteroepitaxy and Strain Control
Engineered Substrates: Technology
Characterization of Strained Layers
Engineered Substrates

ELECTRONIC PROPERTIES OF ENGINEERED SUBSTRATES
Substrate-Induced Strained-Si
Carrier Lifetime
Mobility: Thickness Dependence
Mobility: Temperature Dependence
Diffusion in Strained-Si
Process-Induced Strained-Si
Uniaxial vs. Biaxial Strain Engineering

GATE DIELECTRICS ON ENGINEERED SUBSTRATES
Strained-Si MOSFET Structures
Thermal Oxidation of Strained-Si
Rapid Thermal Oxidation
Plasma Nitridation of Strained-Si
Effect of Surface Roughness
Effect of Strained-Si Layer Thickness
High-k Gate Dielectrics on Strained-Si
Gate Dielectrics on Ge

HETEROSTRUCTURE SiGe/SiGeC MOSFETS
SiGe/SiGeC:Material Parameters
SiGe Hetero-FETs: Structures and Operation
SiGe p-MOSFETs on SOI
SiGeC Hetero-FETs
SiGe-Based HEMTs
Design Issues

STRAINED-Si HETEROSTRUCTURE MOSFETS
Operating Principle
Uniaxial Stress: Process Flow
Strained-Si MOSFETs with SiC-Stressor
Biaxial Strain: Process Flow
Scaling of Strained-Si MOSFETs
Strained-Si MOSFETs: Reliability
Industry Example: TSMC
Industry Example: AMD

MODELING AND SIMULATION OF HETERO-FETS
Simulation of Hetero-FETs
Modeling of Strained-SiMaterial Parameters
Simulation of Strained-Si n-MOSFETs
Characterization of Strained-Si Hetero-FETs
TCAD: Strain-Engineered Hetero-FETs
SPICE Parameter Extraction
Performance Assessment

Summaries and References appear in each chapter.

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