Examines all important aspects of integrated circuit design, fabrication, assembly and test processes as they relate to quality and reliability. This second edition discusses in detail: the latest circuit design technology trends; the sources of error in wafer fabrication and assembly; avenues of contamination; new IC packaging methods; new in-line process monitors and test structures; and more.;This work should be useful to electrical and electronics, quality and reliability, and industrial engineers; computer scientists; integrated circuit manufacturers; and upper-level undergraduate, graduate and continuing-education students in these disciplines.
Preface
Overview of Integrated Circuit Quality and Trends
Historical Perspective on IC Quality
Trends
References
Introduction to Integrated Circuit Manufacturing Processes
Front-End IC Fabrication Operations
Basic IC Materials
IC Design
Mask Making
IC Fabrication Sequence
Depositing Layers on the Water Surface
Chemical Vapor Deposition
Evaporation
Sputtering
Die Passivation
Typical IC Processes
References
Back-End Fabrication Operations
Water Probe Test
New Water Probe Methods
Scribe and Break
Assembling and Packaging the IC
Electrical Testing
Yield Considerations
References
Selected Readings
In-Line Process Monitors and Test Structures
References
Impact of New Technologies
Circuit Design Trends
What the DRAM Future Promises
Vertical Structures
Three-Dimensional ICs
Logic Stimulations
References
Changing Fabrication Techniques
Lithography
Doping Trends- Changes in Diffusions Furnace Usage
Ion Implantation
Material Technology Trends
VLSI Metallization
Summary
References
Selected Readings
Packaging Technology Trends
New Package Solutions
Multichip Module Packages
Die Interconnection Techniques
References
Selected Readings
Electrical Testing of VSICs and ASICs
Introduction
The Purpose of Testing
Historical SSI and MSI Test Program Development Methodology
The Nature if VLSI Circuits as It Impacts Testing
Testing VLSIC Devices
Test Philosophy
Systems of Silicon
The Designer( User) Foundry (Supplier) Interface
Test Specifications
Integrating Designs and Test
The Simulator- Tester Relationship
Test Generation and Fault Simulation
Other Methods of Applying Simulation to Test
Testability
Design-for-Test
Engineering Workstations
ATE Software Verification
Conclusion
References
Selected Reading
Contamination and Manufacturing Errors
References
Contamination
Water Ecology
Sources of Contamination
References
Human-Derived Contamination
Human Traffic
Human Dust
Protective Garments
References
IC Processing Contamination
Photomasking and Photoresist Defects
Etch
Dry Processing
High-Temperature Processes
Ion Implantation
Equipment Contamination
Wafer Processing Automation
Electrostatic Charge
Equipment Considerations that Could Produce Errors at Wafer Probe
Contamination During Bonding and Packaging Operations
References
Selected Readings
Contamination Control
References
Computer-Based Sources of Error in Design and Test
Circuit Design Overview
Sources of Error
References
Materials Issues
Introduction
IC Material Properties
Degradation
Dislocations
Mechanical Defects
Stress Concentrators
Dielectric Layers
Metallization
Package and Interconnection Issues
References
Causes (Sources) of IC Failures
Fabrication-Related Causes of IC Defects
Bulk and Surface Failures
Processing Faults
Dielectric Breakdown
Ionic Contamination
Hot Carrier Effects
Metallization
Summary of VLSI Circuit Defects nd Failure Mechanisms
References
Selected Readings
Packaging- and Assembly-Related Causes of IC Failures
Overview
Surface Passivation and Corrosion
Electromagnetic Migration
Die Bonding Issues
The Physical Package
Hermetic Package Reliability
Plastic Package Reliability
External Package Moisture-Induced Failure Mechanisms
Human Causes of Error
Summary
References
Reliability Improvement
Overview
The Bathtub Failure curve
The Arrhenius Equation and Temperature Acceleration
Activation Energy
Problems Encountered in Applying the Arrhenius Equation
References
Introduction to Screening
Screening
Introduction
ESS Overview
Most Commonly Employed Screens
Conventional Screening Procedures
Screening Sequence
Selected Stress Screen Discussion
Monitoring the Screening Program
Appendix – Periodic Table of Elements
Indexz
Biography
Hnatek, Eugene R.
"The new edition brings the baseline IC technology and tool set up to date. . ..it covers all the material in more depth than the first edition. . .. . . .a good tutorial on IC fabrication and packaging, including quality concerns. . .. Excellent chapters on design, fabrication, packaging, and test put today's engineer in a good position to understand the impact of contamination and manufacturing errors on their IC products. "
---IEEE Components, Packaging, and Manufacturing Technology Society Newsletter