The book covers various aspects of VHDL programming and FPGA interfacing with examples and sample codes giving an overview of VLSI technology, digital circuits design with VHDL, programming, components, functions and procedures, and arithmetic designs followed by coverage of the core of external I/O programming, algorithmic state machine based system design, and real-world interfacing examples.
• Focus on real-world applications and peripherals interfacing for different applications like data acquisition, control, communication, display, computing, instrumentation, digital signal processing and top module design
• Aims to be a quick reference guide to design digital architecture in the FPGA and develop system with RTC, data transmission protocols
PART-I BASIC SYSTEM MODELING AND PROGRAMMING TECHNIQUES
1 VLSI TECHNOLOGY: HISTORY, FEATURES AND FPGA ARCHITECTURE
1.1 Introduction and Preview
1.2 A review of Microelectronics
1.3 CMOS Technology and Gate Configuration
1.4 CMOS Fabrication and Layout
1.5 VLSI Design Flow
1.6 Combinational and Sequential Circuit Design
1.7 Subsystem Design and Layout
1.8 Types of ASCICs and Its Design Flow
1.9 VHDL Requirement and Features
1.10 Laboratory Exercises
2 DIGITAL CIRCUIT DESIGN WITH VHDL
2.1 Introduction and Preview
2.2 Code Design Structures
2.3 Data Types and their Conversions
2.4 Operators and Attributes
2.5 Concurrent Code
2.6 Sequential Code
2.7 Flip Flop and Their Conversions s
2.8 Data Shift Registers
2.9 Multi-frequency Generator
2.10 Laboratory Exercises
3 SIMPLE SYSTEM DESIGN TECHNIQUES
3.1 Introduction and Preview
3.2 Half and Full Adder
3.3 Half and Full Subtractor
3.4 Signed Magnitude Comparator
3.5 Seven Segment Display Interfacing
3.6 Counter Design and Interfacing
3.7 Digital Clock Design and Interfacing
3.8 PWM Signal Generation
3.9 Special System Design Techniques
3.10 Laboratory Exercises
4 ARITHMETIC AND LOGICAL PROGRAMMING
4.1 Introduction and Preview
4.2 Arithmetic Operations: Adders and Subtractors
4.3 Arithmetic Operations: Multipliers
4.4 Arithmetic Operations: Dividers
4.5 Trigonometric Computations Using CORDIC Algorithm
4.6 Multiply-Accumulation Circuit
4.7 Arithmetic and Logical Unit
4.8 ROM Design and Logic Implementations
4.9 RAM Design
4.10 Laboratory Exercises
PART – II CUSTOM I/O PERIPHERALS INTERFACING
5 I/O BANK PROGRAMMING AND INTERFACING
5.1 Introduction and Preview
5.2 Optical Display Interfacing
5.3 Buzzer Control
5.4 LCDs Interfacing and Programming
5.5 General Purpose Switches Interfacing
5.6 Dual Tone Multi Frequency (DTMF) Decoder
5.7 Optical Sensors Interfacing
5.8 Special Sensors Interfacing
5.9 Wind Speed Sensor Interfacing
5.10 Laboratory Exercises
6 SYSTEM DESIGN WITH FINITE AND ALGORITHMIC STATE MACHINE APPROACHES
6.1 Introduction and Preview
6.2 Finite State Machine (FSM) Design: Moore and Mealy Model
6.3 Code Classifier and Binary to BCD Converters
6.4 Binary Sequence Recognizer
6.5 Vending Machine Controller
6.6 Traffic Light Controller
6.7 Escalator , Dice Game and Model Train Controller Design
6.8 Algorithmic State Machine (ASM) Chart
6.9 ASM Based Digital System Design
6.10 Laboratory Exercises
7 INTERFACING DIGITAL LOGIC TO THE REAL WORLD: SENSORS, A/D AND D/A
7.1 Introduction and Preview
7.2 Basics of Signal Conditioning for Sensor Interfacing
7.3 Principle of Sensors Interfacing and Measurement Techniques
7.4 Universal Asynchronous Receiver-Transmitter (UART) Design
7.5 Multichannel Data Logging
7.6 Bipolar Signal Conditioning and Data Logging
7.7 Encoder/Decoder Interfacing for Remote Control Applications
7.8 PRBS Generator and TDMA
7.9 Signal Generators Design and Interfacing
7.10 Laboratory Exercises
PART – III HARDWARE ACCELERATED DESIGNS
8 RTC AND INTERFACE PROTOCOL PROGRAMMING
8.1 Introduction and Preview
8.2 Real Time Clock (DS12887) Interface Programming
8.3 I2C Interface Programming
8.4 Two Wire Interface (SHT11 Sensor) Programming
8.5 Serial Peripheral Interface (SCP1000D) Programming
8.6 GSM Interface Programming
8.7 GPS Interface Programming
8.8 PS/2 Interface Programming
8.9 VGA Interface Programming
8.10 Laboratory Exercises
9 REAL-WORLD CONTROL DEVICES INTERFACING
9.1 Introduction and Preview
9.2 Relay, Solenoid Valve, Opto-isolator and DC Motor Interfacing and Control
9.3 Servo and BLDC Motor Interfacing and Control
9.4 Stepper Motor Control
9.5 Liquid/Fuel Level Control
9.6 Voltage and Current Measurement
9.7 Power Electronics Device Interfacing and Control
9.8 Power Electronics Bidirectional Switch Interfacing and Control
9.9 Real-time Process Controller Design
9.10 Laboratory Exercises
10 FLOATING-POINT COMPUTATIONS WITH VHDL AND XILINX SYSTEM GENERATOR (SYS-GEN) TOOLS
10.1 Introduction and Preview
10.2 Representation of Fixed and Floating-Point Binary Numbers
10.3 Floating-Point Arithmetic
10.4 Xilinx System Generator (Sys-Gen) Tools
10.5 Fractional-Point Computation Using Sys-Gen Tools
10.6 System Engine Model Using Xilinx Simulink Block Sets
10.7 MATLAB Code Interfacing with Sys-Gen Tools
10.8 VHDL Code Interfacing with Sys-Gen Tools
10.9 Real-time Verification and Reconfigurable Architecture Design
10.10 Laboratory Exercises
PART – IV MISCELLANEOUS DESIGN AND APPLICATIONS
11 DIGITAL SIGNAL PROCESSING WITH FPGA
11.1 Introduction and Preview
11.2 Discrete Fourier Transform (DFT)
11.3 Digital Finite Impulse Response (FIR) Filter Design
11.4 Digital Infinite Impulse Response (IIR) Filter Design
11.5 Multirate Signal Processing
11.6 Modulo Adder and Residual Number Arithmetic (RNA) Systems
11.7 Distributed Arithmetic (DA) Based Computations
11.8 Booth Multiplication-Algorithm and Design
11.9 Adaptive Filter/Equalizer Design
11.10 Laboratory Exercises
12 ADVANCED IP BASED SYSTEM DESIGN AND APPLICATIONS
12.1 Introduction and Preview
12.2 FFT Computation using SysGen Design
12.3 FIR Digital Filter Design
12.4 IIR Digital Filter Design
12.5 MAC FIR Filter Using SysGen Design
12.6 CIC Filter Design
12.7 CORDIC Design Using SysGen Tools
12.8 Image Processing using Discrete Wavelet Transform (DWT)
12.9 VHDL Design Debugging Techniques
12.10 Laboratory Exercises
13 CONTEMPORARY DESIGN AND APPLICATIONS
13.1 Introduction and Preview
13.2 DPCM System Design
13.3 Data Encryption System
13.4 Soft Computing Algorithms
13.5 BER Tester Design
13.6 Optical Up/Down Data Link
13.7 Channel Coding Techniques
13.8 Pick and Place Robot Controller
13.9 Audio Codec (AC97) Interface
13.10 Laboratory Exercises
References
Appendix - A
Index
Biography
A. Arockia Bazil Raj received his B.E degree in Electronics and Communication Engineering from the Bharathidasan University, Tiruchirappalli, India, his M.E degree in Communication Systems and his Ph.D degree in Information and Communication Technology from the Anna University, Chennai, India. His Ph.D research on Free Space Optical Communication was fully funded by the Defence Research and Development Organization (DRDO), New Delhi, India, under the ER&IPR project. He has delivered several invited talks and headed national/international conferences’ sessions. He has authored several papers published in reputed international journals and conferences. He published four books that are designed based on his teaching and research experience. He is a Reviewer in various journals of IEEE, Springer, OSA, Wiley, Taylor & Francis, SAGE and Elsevier etc., He is a Member of ISTE, IEEE, IET and SPIE. He was an Assistant Professor in the Kings College of Engineering, Thanjavur, India from 2002 to 2006. He has been Associate Professor in the Research, Development and Establishment (RDE) section of the Laser Communication Laboratory (LCL) facility in the same institute from 2007 to October 2015. Presently, he is working in the field of Radar System Design and Radar Signal Processing in Defence Institute of Advanced Technology, Pune, Maharashtra, India from November 2015 onwards. He has successfully completed/investigated various research projects sponsored by government and non-government sectors/laboratories. His current research interests cover the free-space optical communication, Radar System Design, Photonics Radar Design, MIMO Radar Design and Radar signal processing.
