1st Edition
Advances in Hardware Design for Security and Trust
Chapter 1 Introduction
Ranga R. Vemuri and John M. Emmert
Chapter 2 Hardware Security In The Consumer Technology Industry
Paul M. Simon
Chapter 3 A Commercial EDA Perspective on Hardware Security, Safety, and Trust
P. Len Orlando III, Lang Lin, and Norman Chang
Chapter 4 Machine Learning Techniques for Detecting Hardware Trojans in ASIC Designs
Kevin Immanuel Gubbi, Banafsheh Saber Latibari, Setareh Rafatirad, Avesta Sasan, Soheil Salehi, and Houman Homayoun
Chapter 5 Next-Generation Semiconductor Reverse Engineering: Laser Delayering, Correlative Imaging, and Cloud-Enabled Image Analysis Techniques
Hongbin Choi, Matthew Maniscalco, Adrian Phoulady, Alexander Blagojevic, Toni Moore, Mohammad Taghi Mohammadi Anaei, Todor Bliznakov, Marcus Emanuel, Parisa Mahyari, Nichoals May, Sina Shahbazmohamadi, and Pouya Tavousi
Chapter 6 Synthesis of Polymorphic Circuits for Hardware Security
Haimanti Chakraborty and Ranga Vemuri
Chapter 7 Design Obfuscation and Performance-Locking Solutions for Mixed-Signal, Analog and RF ICs
Priyanshu Mishra, Andrew Marshall, and Yiorgos Makris
Chapter 8 On-Chip Integrity, Reliability, and Aging Assurance Techniques for ICs
Manoj Yasaswi Vutukuru and Rashmi Jha
Chapter 9 Deep Learning Side-Channel Attacks: Challenges and Opportunities
Logan Reichling,Mabon Ninan, BoyangWang, and John M.Emmert
Chapter 10 Side-Channel Attack Avoidance and Mitigation Through Asynchronous Digital Design
John M. Emmert and Anvesh Perumalla
Chapter 11 Is ARM’s TrustZone Trustable for Confidentiality Protection?
Tianhong Xu and Yunsi Fei
Chapter 12 Security Verification for Next-Generation SoCs
Samit Shahnawaz Miftah, Amisha Srivastava, Yiorgos Makris, and Kanad Basu
Chapter 13 Cloud FPGA Accelerator Fingerprinting Using Communication Side Channels
Chongzhou Fang, Ning Miao, Han Wang, Jiacheng Zhou, Tyler Sheaves, JohnM. Emmert, Avesta Sasan, and Houman Homayoun
Chapter 14 Enterprise Risk Management of Electronics and Computing Device Supply Chains
Zachary A. Collier and James H. Lambert
Biography
Ranga Vemuri is a Professor in Electrical and Computer Engineering and directs the Digital Design Environments Lab at the University of Cincinnati where served since 1989. His interests are in Hardware Trust, Correctness and Security, VLSI Design and Design Automation, and Reconfigurable Computing. His research has been funded by AFRL, DAGSI, DARPA, NSF, State of Ohio and various industries. He and his students have published over 300 papers and have received several Best Paper Awards and nominations. Prof. Vemuri co-authored two books and graduated 42 PhD and over 90 MS students. He served on the program committees of numerous international conferences and served as an Associate Editor of the IEEE Transactions on VLSI and as a Guest Editor of the IEEE Computer.
John Emmert has been an Electrical Engineering Professor since 1999. His research has been funded by AFRL, DARPA, NSF, the US Congress, the State of Ohio and various industrial companies, and he currently has eight full and three provisional US patents, all related to integrated circuit design. He is the Director of the NSF Center for Hardware and Embedded Systems Security and Trust (CHEST) I/UCRC. He also served in the United States Air Force from 1989-2015. In the Air Force he held positions from UAV pilot to reserve wing commander, and after 26 years of service, he retired as a Colonel. He has been awarded the Air Force Legion of Merit and five Meritorious Service Medals.
