FinFET Devices for VLSI Circuits and Systems: 1st Edition (Hardback) book cover

FinFET Devices for VLSI Circuits and Systems

1st Edition

By Samar K. Saha

CRC Press

368 pages | 133 B/W Illus.

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Hardback: 9781138586093
pub: 2020-07-07
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To surmount the continuous scaling challenges of MOSFET devices, FinFETs have emerged as the real alternative for use as the next generation device for IC fabrication technology. The objective of the book is to provide the basic theory and operating principles of FinFET devices and technology, an overview of FinFET device architecture and manufacturing processes, detailed formulation of FinFET electrostatic and dynamic device characteristics for IC design and manufacturing. Thus, this book caters to practicing engineers transitioning to FinFET technology and prepares the next generation device engineers and academic experts on mainstream device technology at the nanometer-nodes.

Table of Contents

1. Introduction

1.1 Fin Field-Effect Transistors

1.2 Overview of MOSFET Devices for Integrated Circuit Manufacturing

1.3 Alternative Device Concepts

1.4 FinFET Devices for VLSI Circuits and Systems

1.5 A Brief History of FinFET Devices

1.6 Summary


2. Fundamentals of Semiconductor Physics

2.1 Introduction

2.2 Semiconductor Physics

2.3 Theory of n-type and p-Type Semiconductors in Contact

2.4 Summary


3. Multiple Gate Metal-Oxide-Semiconductor (MOS) System

3.1 Introduction

3.2 Multigate MOS Capacitors at Equilibrium

3.3 MOS Capacitor under Applied Bias

3.4 Multigate MOS Capacitor Systems: Mathematical Analysis

3.5 Quantum Mechanical Effect

3.6 Summary


4. Overview of FinFET Device Technology

4.1 Introduction

4.2 FinFET Manufacturing Technology

4.3 Bulk-FinFET Fabrication

4.4 SOI FinFET Process Flow

4.5 Summary


5. Long Channel FinFETs

5.1 Introduction

5.2 Basic Features of FinFET Devices

5.3 FinFET Device Operation

5.4 Drain Current Formulation

5.5 Summary


6. Small Geometry FinFETs: Physical Effects on Device Performance

6.1 Introduction

6.2 Short-channel Effects on Threshold Voltage

6.3 Quantum Mechanical Effects

6.4 Surface Mobility

6.5 High Field Effects

6.6 Output Resistance

6.7 Summary


7. Leakage Currents in FinFETs

7.1 Introduction

7.2 Subthreshold Leakage Currents

7.3 Gate-Induced Drain and Source Leakage Currents

7.4 Impact Ionization Current

7.5 Source-Drain pn-Junction Leakage Current

7.6 Gate Oxide Tunneling Currents

7.7 Summary


8. Parasitic Elements in FinFETs

8.1 Introduction

8.2 Source-Drain Parasitic Resistance

8.3 Gate Resistance

8.4 Parasitic Capacitance Elements

8.5 Source-Drain pn-Junction Capacitance

8.6 Summary


9. Challenges of FinFET Process and Device Technology

9.1 Introduction

9.2 Process Technology Challenges

9.3 Device Technology Challenges

9.4 Challenges in FinFET Circuit Design

9.5 Summary


10. FinFET Compact Modeling for Circuit Simulation

10.1 Introduction

10.2 Compact Device Model

10.3 Common Multiple-Gate Compact FinFET Model

10.4 Dynamic Model

10.5 Process Variability Modeling

10.6 Summary


About the Author

Samar K. Saha received the Ph.D. degree in Physics from Gauhati University, India and MS degree in Engineering Management from Stanford University, USA. Currently, he is an Adjunct Professor in the Electrical Engineering department at Santa Clara University, USA and a technical advisor at Prospicient Devices, California, USA. Since 1984, he has worked at various positions for National Semiconductor, LSI Logic, Texas Instruments, Philips Semiconductors, Silicon Storage Technology, Synopsys, DSM Solutions, Silterra USA, and SuVolta. He has, also, worked as a faculty member in the Electrical Engineering departments at Southern Illinois University at Carbondale, Illinois; Auburn University, Alabama; the University of Nevada at Las Vegas, Nevada; and the University of Colorado at Colorado Springs; Colorado. He has authored over 100 research papers; one book entitled, Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond, CRC Press, Florida (2015); one book chapter on Technology Computer-Aided Design (TCAD), entitled, “Introduction to Technology Computer-Aided Design,” in Technology Computer Aided Design: Simulation for VLSI MOSFET, C.K. Sarkar (ed.): CRC Press, Florida (2013), and holds 12 US patents. His research interests include nanoscale device and process architecture, TCAD, compact modeling, devices for renewable energy, and TCAD and R&D management.

Dr. Saha is the 2016-2017 President of the IEEE Electron Devices Society (EDS). He is a Fellow of the Institution of Engineering and Technology (IET, UK), and a Distinguished Lecturer of IEEE EDS. He has served as the Vice President of EDS Publications; an elected member of the EDS Board of Governors; Editor-In-Chief of IEEE QuestEDS; Chair of EDS George Smith and Paul Rappaport awards; editor of Region-5&6 EDS Newsletter, Chair of EDS Compact Modeling Technical Committee, Chair of EDS North America West Subcommittee for Regions/Chapters, a member of the IEEE Conference Publications Committee; a member of the IEEE TAB Periodicals Committee; and the Treasurer, Vice Chair, and Chair of Santa Clara Valley EDS chapter.

In editorial board, Dr. Saha has served as the head guest editor for the IEEE TRANSACTIONS ON ELECTRON DEVICES (T-ED) Special Issues (SIs) on “Advanced Compact Models and 45-nm Modeling Challenges” and “Compact Interconnect Models for Giga Scale Integration,” and as a guest editor for the T-ED SI on “Advanced Modeling of Power Devices and their Applications.” He has, also, served as a member of the editorial board of the World Journal of Condensed Matter Physics (WJCMP) published by Scientific Research Publishing (SCIRP).

Subject Categories

BISAC Subject Codes/Headings:
TECHNOLOGY & ENGINEERING / Electronics / General
TECHNOLOGY & ENGINEERING / Electronics / Circuits / General
TECHNOLOGY & ENGINEERING / Electronics / Microelectronics