Fundamentals of Parallel Multicore Architecture: 1st Edition (Hardback) book cover

Fundamentals of Parallel Multicore Architecture

1st Edition

By Yan Solihin

Chapman and Hall/CRC

468 pages | 161 B/W Illus.

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pub: 2015-11-24
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Description

Although multicore is now a mainstream architecture, there are few textbooks that cover parallel multicore architectures. Filling this gap, Fundamentals of Parallel Multicore Architecture provides all the material for a graduate or senior undergraduate course that focuses on the architecture of multicore processors. The book is also useful as a reference for professionals who deal with programming on multicore or designing multicore chips.

The text’s coverage of fundamental topics prepares students to study research papers in the multicore architecture area. The text offers many pedagogical features, including:

  • Sufficiently short chapters that can be comfortably read over a weekend
  • Introducing each concept by first describing the problem and building intuition that leads to the need for the concept
  • "Did you know?" boxes that present mini case studies, alternative points of view, examples, and other interesting facts or discussion items
  • Thought-provoking interviews with experts who share their perspectives on multicore architectures in the past, present, and future
  • Online programming assignments and solutions that enhance students’ understanding

The first several chapters address programming issues in shared memory multiprocessors, such as the programming model and techniques to parallelize regular and irregular applications. The core of the book covers the architectures for shared memory multiprocessors. The final chapter contains interviews with experts in parallel multicore architecture.

Reviews

"This text provides a lucid and comprehensive treatment of hardware/software foundations of parallel architectures by a leading expert in the area."

—Rajeev Balasubramonian, University of Utah

"This book does an excellent job covering parallel multicore architectures and their programming models. It covers these topics in the crucial context of advanced memory hierarchy designs. The text is accessible to senior undergraduate students and graduate students in computer science and computer engineering. … a self-contained reference for the target audience; the text is comprehensive and strikes a good balance between the principles and in-depth details of modern multicore architecture designs."

—Robert van Engelen, Florida State University

"The author first discusses the basic hardware and history of multicore architectures, then discusses the basic ideas of how to analyze code to determine parallelism (and the basic concepts of different parallelism techniques), and then discusses the specifics of how to write shared memory parallel programs, and so on. In this way, the topics become increasingly focused on the desired content of the book, that of the details in constructing multicore architectures. This book is well organized and thought out, and I imagine that it [will be] well received by students."

—Daniel R. Reynolds, Southern Methodist University

"… this book would be appealing to students and practitioners who would like to get an in-depth understanding of multicore architecture and designing efficient programs for these architectures."

—Purushotham Bangalore, University of Alabama at Birmingham

Table of Contents

Perspectives on Multicore Architectures

The Origin of the Multicore Architecture

Perspectives on Parallel Computers

Future Multicore Architectures

Perspectives on Parallel Programming

Limits on Parallel Program Performance

Parallel Programming Models

Shared Memory Parallel Programming

Steps in Parallel Programming

Dependence Analysis

Identifying Parallel Tasks in Loop Structures

Identifying Parallelism at Other Levels

Identifying Parallelism through Algorithm Knowledge

Determining the Scope of Variables

Synchronization

Assigning Tasks to Threads

Mapping Threads to Processors

A Brief Introduction to OpenMP

Parallel Programming for Linked Data Structures

Parallelization Challenges in LDS

Approaches to Parallelization of LDS

Parallelization Techniques for Linked Lists

The Role of Transactional Memory

Introduction to Memory Hierarchy Organization

Motivation for Memory Hierarchy

Basic Architectures of a Cache

Cache Performance

Prefetching

Cache Design in Multicore Architecture

Physical Cache Organization

Logical Cache Organization

Case Studies

Introduction to Shared Memory Multiprocessors

The Cache Coherence Problem

Memory Consistency Problem

Synchronization Problem

Basic Cache Coherence Issues

Overview

Cache Coherence in Bus-Based Multiprocessors

Impact of Cache Design on Cache Coherence Performance

Performance and Other Practical Issues

Broadcast Protocol with Point-to-Point Interconnect

Hardware Support for Synchronization

Lock Implementations

Barrier Implementations

Transactional Memory

Memory Consistency Models

Programmers’ Intuition

Architecture Mechanisms for Ensuring Sequential Consistency

Relaxed Consistency Models

Synchronization in Different Memory Consistency Models

Advanced Cache Coherence Issues

Directory Coherence Protocols

Overview of Directory Coherence Protocol

Basic Directory Cache Coherence Protocol

Implementation Correctness and Performance

Contemporary Design Issues

Interconnection Network Architecture

Link, Channel, and Latency

Network Topology

Routing Policies and Algorithms

Router Architecture

Case Study: Alpha 21364 Network Architecture

Multicore Design Issues

SIMT Architecture

SIMT Programming Model

Mapping SIMT Workloads to SIMT Cores

SIMT Core Architecture

Ask the Experts

Exercises appear at the end of each chapter.

About the Author

Yan Solihin is a professor of electrical and computer engineering at North Carolina State University, where he founded and leads the Architecture Research for Performance, Reliability, and Security (ARPERS) group. Dr. Solihin has been a recipient of the IBM Faculty Partnership Award, NSF Faculty Early Career Award, and AT&T Leadership Award. He is listed in the HPCA Hall of Fame and is a senior member of the IEEE. His research interests include computer architecture, computer system modeling methods, and image processing.

About the Series

Chapman & Hall/CRC Computational Science

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Subject Categories

BISAC Subject Codes/Headings:
COM000000
COMPUTERS / General
COM011000
COMPUTERS / Systems Architecture / General
COM012040
COMPUTERS / Programming / Games
COM059000
COMPUTERS / Computer Engineering