1st Edition

Graphene and VLSI Interconnects

126 Pages 17 Color & 40 B/W Illustrations
by Jenny Stanford Publishing

126 Pages 17 Color & 40 B/W Illustrations
by Jenny Stanford Publishing

Copper (Cu) has been used as an interconnection material in the semiconductor industry for years owing to its best balance of conductivity and performance. However, it is running out of steam as it is approaching its limits with respect to electrical performance and reliability. Graphene is a non-metal material, but it can help to improve electromigration (EM) performance of Cu because of its... Read more

1. Introduction 
2. Graphene Synthesis Methods 
3. Novel and Improved Graphene Synthesis Method 
4.Statistical Approach to Identify Key Growth Parameters of the Novel Graphene Growth PVD Processes 
5. Copper–Graphene Interconnect 

Biography

Cher-Ming Tan is Director of the Center for Reliability Sciences and Technologies (CReST) and a professor at the Department of Electronic Engineering as well as the Institute of Radiation Research, College of Medicine, Chang Gung University, Taoyuan, Taiwan. He is an honorary chair professor at the Center of Reliability Engineering, Ming Chi University of Technology, New Taipei, Taiwan, and a researcher at the Department of Urology, Chang Gung Memorial Hospital, Taoyuan, Taiwan. He earned his PhD (1992) in Electrical Engineering from the University of Toronto, Ontario, Canada. He joined Nanyang Technological University, Singapore, as a faculty member in 1997 and Chang Gung University in 2014. His research interests include materials analysis, failure analysis, reliability of electronics devices, reliability of system, reliability statistics, modeling, and simulation.
Udit Narula is a postdoctoral research fellow at CReST. He completed his BTech (2011) from Maharshi Dayanand University, Haryana, India, and MTech (2013) from Amity University, Noida, India. He earned his PhD (2018) from the Department of Electronic Engineering, Chang Gung University. His research interests include graphene-based ULSI interconnects, graphene synthesis methods, and component/system reliability analysis and statistics.
Vivek Sangwan is a postdoctoral research fellow at CReST. He completed his BTech (2012) from Dr. A. P. J. Abdul Kalam Technical University, Lucknow, India, and MTech (2014) from Amity University. He earned his PhD (2019) from the Department of Electronic Engineering, Chang Gung University. His research interests include failure and reliability analysis of electronic devices, DoE, and design and simulation of 3D models.