1st Edition

High-Speed and Lower Power Technologies Electronics and Photonics

Edited By Jung Han Choi, Krzysztof Iniewski Copyright 2019
    376 Pages
    by CRC Press

    376 Pages 9 Color & 167 B/W Illustrations
    by CRC Press

    376 Pages 9 Color & 167 B/W Illustrations
    by CRC Press

    This book explores up-to-date research trends and achievements on low-power and high-speed technologies in both electronics and optics. It offers unique insight into low-power and high-speed approaches ranging from devices, ICs, sub-systems and networks that can be exploited for future mobile devices, 5G networks, Internet of Things (IoT), and data centers. It collects heterogeneous topics in place to catch and predict future research directions of devices, circuits, subsystems, and networks for low-power and higher-speed technologies. Even it handles about artificial intelligence (AI) showing examples how AI technology can be combined with concurrent electronics. Written by top international experts in both industry and academia, the book discusses new devices, such as Si-on-chip laser, interconnections using graphenes, machine learning combined with CMOS technology, progresses of SiGe devices for higher-speed electronices for optic, co-design low-power and high-speed circuits for optical interconnect, low-power network-on-chip (NoC) router, X-ray quantum counting, and a design of low-power power amplifiers.

    • Covers modern high-speed and low-power electronics and photonics.

    • Discusses novel nano-devices, electronics & photonic sub-systems for high-speed and low-power systems, and many other emerging technologies like Si photonic technology, Si-on-chip laser, low-power driver for optic device, and network-on-chip router.

    • Includes practical applications and recent results with respect to emerging low-power systems.

    • Addresses the future perspective of silicon photonics as a low-power interconnections and communication applications.

    The End of Moore's Law and Reinventing Computing. When the Physical Disorder of CMOS Meets Machine Learning. SiGe BICMOS Technology and Devices. Base Doping Profile Engineering for High-Performance SiGe PNP Heterojunction Bipolar Transistors. Performance Evaluation of AsF5-intercalated Top-Contact Multilayer Graphene Nanoribbons for Deeply Scaled Interconnects. Silicon-on-chip Lasers for Chip-level Optical Interconnects. Integrated Photonic Interconnects for Computing Platforms. Ultra-Low Power SiGe Driver-IC for High-Speed InP Mach-Zehnder Modulator. Efficient and Low-Power NoC Router Architecture. Rapid Static Memory Read-Write for Energy-Aware Applications. Application Specific Integrated Circuits for Direct X-Ray and Gamma-Ray Conversion in Security Applications. High Efficiency Power Amplifiers.


    Jung Han Choi received the B.S. and M.S. degrees in electrical engineering from the Sogang University, Seoul, Korea, in 1999 and 2001, respectively, and the Dr.-Ing. degree from the Technische Universität München, Munich, Germany in 2004. From 2001 to 2004, he was a research scientist in the Institute for High-Frequency engineering at the Technische Universität München, Germany. During this time, he worked on the high-speed device modeling, thin-film fabrication, network analyzer measurement and circuit development for high-speed optical communications. From 2005 to 2011, he was with the Samsung Advanced Institute of Technology and the Samsung Electronics where he worked on the RF bio-health sensor, nano devices and RF/millimeter-wave circuit design including 60 GHz Si CMOS ICs. In 2011 he joined at the Fraunhofer Institute (Heinrich-Hertz Institute), Berlin, Germany. Now he is working on ultra-low power high data bit rate transmitter and receiver circuits for optical communications, microwave devices, electromagnetic simulations, and network analyzer measurement up to 170 GHz.

    In 2003, he was awarded for the EEEfCOM (Electrical and Electronic Engineering for Communication) Innovation prize 2003 for the contribution to the development of the high-speed receiver circuit. His current research interests range from microwave active/passive devices & IC, electromagnetic simulation & analysis, and metamaterials. He holds 18 international registered and 22 pending patents in the area of semiconductor device, circuits, and systems for high-frequency engineering.

    Krzysztof (Kris) Iniewski is managing R&D at Redlen Technologies Inc., a start-up company in Vancouver, Canada. Redlen’s revolutionary production process for advanced semiconductor materials enables a new generation of more accurate, all-digital, radiation-based imaging solutions. Kris is also a President of CMOS Emerging Technologies (www.cmoset.com), an organization of high-tech events covering Communications, Microsystems, Optoelectronics, and Sensors. In his carrier Dr. Iniewski held numerous faculty and management positions at University of Toronto, University of Alberta, SFU, and PMC-Sierra Inc. He has published over 100 research papers in international journals and conferences. He holds 18 international patents granted in USA, Canada, France, Germany, and Japan. He is a frequent invited speaker and has consulted for multiple organizations internationally. He has written and edited several books for IEEE Press, Wiley, CRC Press, McGraw Hill, Artech House, and Springer. His personal goal is to contribute to healthy living and sustainability through innovative engineering solutions. In his leisurely time Kris can be found hiking, sailing, skiing or biking in beautiful British Columbia. He can be reached at [email protected].