1st Edition

Introducing Technology Computer-Aided Design (TCAD) Fundamentals, Simulations, and Applications

By Chinmay K. Maiti Copyright 2017
438 Pages 25 Color & 229 B/W Illustrations
by Jenny Stanford Publishing

438 Pages 25 Color & 229 B/W Illustrations
by Jenny Stanford Publishing

This might be the first book that deals mostly with the 3D technology computer-aided design (TCAD) simulations of major state-of-the-art stress- and strain-engineered advanced semiconductor devices: MOSFETs, BJTs, HBTs, nonclassical MOS devices, finFETs, silicon-germanium hetero-FETs, solar cells, power devices, and memory devices. The book focuses on how to set up 3D TCAD simulation tools, from... Read more

Introduction

The Need

Role of TCAD

TCAD: Challenges

TCAD: 2D versus 3D

TCAD: Design Flow

Extending TCAD

Process Compact Model

Process-Aware Design

Design for Manufacturing

TCAD Calibration

TCAD Tools

Technology Boosters

BiCMOS Process Simulation

SiGe and SiGeC HBTs

Silicon Hetero-FETs

FinFETs

Advanced Devices

Memory Devices

Power Devices

Solar Cells

TCAD for SPICE Parameter Extraction

TCAD for DFM

VWF and Online Laboratory

Summary

Technology CAD Tools

History of Process and Device Simulation Tools

Commercial TCAD Tools

Silvaco Tool Overview

ATHENA

ATLAS

Stress Modeling

Synopsys TCAD Platforms

Atomistic Simulation

Summary

Technology Boosters

Stress Engineering

Intentional Mechanical Stress

Stress-Engineered Transistors

Hybrid Orientation Technology

High-k/Metal Gate

Stress Evolution during Semiconductor Fabrication

Summary

BiCMOS Process Simulations

Ion Implantation Simulation

Optical Lithography Simulation

Contact-Printing Simulation

BJT Process Simulation

3D MOS Process Simulation

Summary

SiGe and SiGeC HBTs

SiGe HBTs: Process and Device Simulation

High-Speed SiGe HBTs

SiGeC HBTs: Process and Device Simulation

Strain-Engineered SiGe HBTs

n-p-n SiGe HBTs with an Extrinsic Stress Layer

n-p-n SiGe HBT Device Employing a Si3N4 Strain Layer

n-p-n SiGe HBT Employing a SiO2 Strain Layer

Summary

Silicon Hetero-FETs

Electronic Properties of Strained Si and SiGe

Strained-Si Channel p-MOSFETs

Summary

FinFETs

Basics of FinFETs

Stress-Engineered FinFETs

FinFET Design and Optimization

Summary

Advanced Devices

Ultrathin-Body SOI

Gate-First SOI

Gate-Last SOI

3D SOI n-MOSFET

TFT

HEMTs

AlGaN/GaN HFET

3D SiC Process and Device Simulation

Summary

Memory Devices

Nanocrystal Floating-Gate Device

Technology Computer-Aided Design of Memory Devices

Process Simulation of Flash Memory Devices

Device Simulation of Flash Memory Devices

State Transition and Single-Event Upset in SRAM

Nanoscale SRAM

Summary

Biography

Chinmay K. Maiti received his B.Sc. (Hons.) in physics (1969), B.Tech. in applied physics (1972), and M.Tech. in radio physics and electronics (1974) from the University of Calcutta, India. He then did his M.Sc. (Res.) in microelectronics (1976) from Loughborough University, UK, and PhD (Eng.) in microelectronics (1984) from the Indian Institute of Technology (IIT), Kharagpur, India. He later joined IIT as professor and was head of the department (2009–2012). From 2004 to 2006 he was a visiting professor at Queen’s University, Belfast, UK. Ignoring an extension offer from IIT, he joined the SOA University, Bhubaneswar, India, in 2015. Dr. Maiti won the INSA-Royal Society (UK) Exchange of Scientists Fellowship in 2003, the CDIL Award for Industry of the Institution of Electronics and Telecommunication Engineers for the best paper in 1997, and the West Bengal Academy of Sciences Fellowship in 2007. He is interested in semiconductor device/process simulation research and microelectronics education. He has published more than 265 technical articles in the silicon-germanium and heterostructure-silicon areas, written 6 monographs and 6 book chapters, and edited Selected Works of Professor Herbert Kroemer (World Scientific, Singapore, 2008).