1st Edition

Nano-CMOS Gate Dielectric Engineering

    248 Pages 149 B/W Illustrations
    by CRC Press

    According to Moore’s Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT.

    This comprehensive, up-to-date text covering the physics, materials, devices, and fabrication processes for high-k gate dielectric materials, Nano-CMOS Gate Dielectric Engineering systematically describes how the fundamental electronic structures and other material properties of the transition metals and rare earth metals affect the electrical properties of the dielectric films, the dielectric/silicon and the dielectric/metal gate interfaces, and the resulting device properties. Specific topics include the problems and solutions encountered with high-k material thermal stability, defect density, and poor initial interface with silicon substrate. The text also addresses the essence of thin film deposition, etching, and process integration of high-k materials in an actual CMOS process.

    Fascinating in both content and approach, Nano-CMOS Gate Dielectric Engineering explains all of the necessary physics in a highly readable manner and supplements this with numerous intuitive illustrations and tables. Covering almost every aspect of high-k gate dielectric engineering for nano-CMOS technology, this is a perfect reference book for graduate students needing a better understanding of developing technology as well as researchers and engineers needing to get ahead in microelectronic engineering and materials science.

    Overview of CMOS Technology
    MOS Transistor: A Quick Introduction to Classical Models
    Short-Channel Effects and Short-Channel Modifications
    Features and Uniqueness of MOS Transistor
    MOS in Deca-Nanometer
    Technology Trends and Options

    High-k Dielectrics
    The High-k Candidates
    Electronic Structure of Transition Metals and Rare Earth Metals
    Material Properties of Elemental Transition Metal and Rare Metal Oxides
    Bandgap and Band Offset Energies
    Bond Ionicity and Dielectric Constant
    Carrier Effective Masses
    Thermal Stability
    Disorders and Defects

    Complex Forms of High-k Oxides
    Silicates and Aluminates Pseudo-Binary Alloys
    Stoichiometric Binary Alloys
    Thermal Stability and Phase Separation

    Dielectric Interfaces
    High-k/Silicon Interface
    High-k/Metal Interface

    Impacts on Device Operation
    Gate Leakage Current
    Threshold Voltage Control and Fermi-Level Pinning
    Channel Mobility
    Subthreshold Characteristics
    Dielectric Breakdown
    Hot-Carrier Effects
    Temperature Instabilities

    Fabrication Issues
    Process Integration
    Atomic Layer Deposition
    Metal Organic Chemical Vapor Deposition
    Physical Vapor Deposition

    Appendix A: Fundamental Physical Constants and Unit Conversions
    Appendix B: Properties of Si and SiO2


    Hei Wong

    ... this book, by covering almost every aspect of high-k gate dielectric engineering for nano-CMOS technology, is as timely as ever for device and process engineers. Though it involves quite a lot of physics, it is never less than fascinating, through its many intuitive illustrations and tables.

    —From the Foreword by Hiroshi Iwai, PhD, Professor, Tokyo Institute of Technology, Japan