1st Edition

Networks-on-Chips Theory and Practice

    389 Pages 138 B/W Illustrations
    by CRC Press

    386 Pages 138 B/W Illustrations
    by CRC Press

    The implementation of networks-on-chip (NoC) technology in VLSI integration presents a variety of unique challenges. To deal with specific design solutions and research hurdles related to intra-chip data exchange, engineers are challenged to invoke a wide range of disciplines and specializations while maintaining a focused approach.

    Leading Researchers Present Cutting-Edge Designs Tools
    Networks-on-Chips: Theory and Practice facilitates this process, detailing the NoC paradigm and its benefits in separating IP design and functionality from chip communication requirements and interfacing. It starts with an analysis of 3-D NoC architectures and progresses to a discussion of NoC resource allocation, processor traffic modeling, and formal verification, with an examination of protocols at different layers of abstraction.

    An exploration of design methodologies, CAD tool development, and system testing, as well as communication protocol, the text highlights important emerging research issues, such as

    • Resource Allocation for Quality of Service (QoS) on-chip communication
    • Testing, verification, and network design methodologies
    • Architectures for interconnection, real-time monitoring, and security requirements
    • Networks-on-Chip Protocols


    Presents a flexible MPSoC platform to easily implement multimedia applications and evaluate future video encoding standards

    This useful guide tackles power and energy issues in NoC-based designs, addressing the power constraints that currently limit the embedding of more processing elements on a single chip. It covers traffic modeling and discusses the details of traffic generators.

    Using unique case studies and examples, it covers theoretical and practical issues, guiding readers through every phase of system design.

    Three-Dimensional Networks-on-Chip Architectures, A. Bartzas, K. Siozios, and D. Soudris

    Resource Allocation for QoS On-Chip Communication, A. Jantsch and Z. Lu

    Networks-on-Chip Protocols, M. Koibuchi and H. Matsutani

    On-Chip Processor Traffic Modeling for NoC Design, A. Scherrer, A. Fraboulet, and T. Risset

    Security in NoCs, L. Fiorin, G. Palermo, C. Silvano, and M. Sami

    Formal Verification of Communications in Networks-on-Chips, D. Borrione, A. Helmy, L. Pierre, and J. Schmaltz

    Test and Fault Tolerance for NoC Infrastructures, P. P. Pande, C. Grecu, A. Ganguly, A. Ivanov, and R. Saleh

    Monitoring Services for Networks-on-Chips, G. Kornaros, I. Papaeystathiou, and D. Pnevmatikatos

    Energy and Power Issues in Network-on-Chips, S. E. Lee and N. Bagherzadeh

    The CHAINworks® Tool Suite: A Complete Industrial Design Flow for NoCs, J. Bainbridge

    NoC-Based Implementation: MPSoC for Video Coding Applications, D. Milojevic, A. Leroy, F. Robert, P. Martin, and D. Verkest



    Fayez Gebali is a professor in the Department of Electrical and Computer Engineering, University of Victoria, British Columbia, Canada. He is a registered professional engineer and a senior member of the IEEE since 1983. Haytham Elmiligi is a Ph.D. candidate at the same school and was a publication chair for the 2007 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. M. Watheq El-Kharashi is currently an associate professor in the Department of Computer and Systems Engineering, Ain Shams University, Cairo, Egypt, and is also an adjunct assistant professor in the Department of Electrical and Computer Engineering, University of Victoria.