1st Edition

Semiconductor Devices and Technologies for Future Ultra Low Power Electronics



  • Available for pre-order. Item will ship after December 10, 2021
ISBN 9781032061610
December 10, 2021 Forthcoming by CRC Press
328 Pages 165 B/W Illustrations

USD $180.00

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Book Description

This book covers the fundamentals and significance of 2D materials, and related semiconductor transistor technologies for the next generation ultra-low power applications. It provides a comprehensive coverage of the advanced low power transistors such as NCFETs, FinFETs, TFETs and flexible transistors for future ultra-low power applications owing to their better subthreshold swing and scalability. It also deals with the use of field effect transistors for biosensing applications and covers the design considerations and compact modeling of advanced low power transistors such as NCFETs, FinFETs and TFETs. TCAD simulation examples are provided at appropriate places. The book,

  • Discusses latest updates in the field of ultra-low power semiconductor transistors.                         
  • Provides both experimental and analytical solutions for TFETs and NCFETs.                                        
  • Presents the synthesis and fabrication of FinFETs.                                                                                         
  • Gives out details of 2D Materials and 2D transistors.                                                                                    
  • Explores the application of FETs for biosensing in healthcare field.            

This book is aimed at researchers, professionals and graduate students in electrical engineering, electronics and communication engineering, electron devices, nanoelectronics and nanotechnology, microelectronics, and solid-state circuits.

Table of Contents

CHAPTER-1: An Introduction to Nanoscale CMOS Technology Transistor: A Future Perspective
Kumar Prasannajit. Pradhan

CHAPTER-2: High Performance Tunnel Field Effect Transistor (TFET) for Future Low Power Applications
Ribu Mathew, Ankur B, and Abhishek Kumar Upadhyay

CHAPTER-3: Ultra Low Power III-V Tunnel Field Effect Transistors
J. Ajayan and D. Nirmal

CHAPTER-4: Performance Analysis of Carbon Nanotube and Graphene Tunnel Field Effect Transistors
K. Ramkumar, Singh Rohitkumar Shailendra, V N Ramakrishnan

CHAPTER-5: Characterization of Silicon FinFETS Under Nanoscale Dimensions
Rock-Hyun Baek and Jun-Sik Yoon

CHAPTER-6: Germenium or SiGe FinFETs for Enhanced Performance in Low Power Applications
Nilesh Kumar Jaiswal and V. N. Ramakrishnan

CHAPTER-7: Switching Performance Analysis of III-V FinFETs
Arighna Basak, Arpan Deyasi, Kalyan Biswas, Angsuman Sarkar

CHAPTER-8: Negative Capacitance Field Effect Transistors to Address the Fundamental Limitations In Technology Scaling
Harsupreet Kaur

CHAPTER-9: Recent Trends in Compact Modeling of Negative Capacitance Field Effect Transistors
Shubham Tayal, Shiromani Balmukund Rahi,Jay Prakash Srivastava, Sandip Bhattacharya

CHAPTER-10: Fundamentals of 2D Materials
Ganesan Anushya, Rasu Ramachandran, Raj Sarika, Michael Benjamin

CHAPTER-11: Two-Dimensional Transition Metal Dichalcogenide (TMD) Materials In Field Effect Transistor (FET) Devices For Low Power Applications
R. Sridevi and J. Charles Pravin

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Editor(s)

Biography

D. Nirmal is presently working as an Associate Professor and Head in the Department of Electronics and Communication engineering. His research interests includes Nanoelectronics, 1D/2D Materials, Carbon nanotubes, GaN Technology, Device and Circuit Simulation – GSL, Sensors,  Nanoscale device design and modelling.

J. Ajayan is an Associate Professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits and photovoltaics.

Patrick Fay is currently a Professor with the Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA. He established the High Speed Circuits and Devices Laboratory, Notre Dame, and oversaw the design, construction, and commissioning of the 9000-ft2 class 100 cleanroom housed in Stinson-Remick Hall at Notre Dame. He has served as the Director of this facility since 2003.