1st Edition
Semiconductor Devices and Technologies for Future Ultra Low Power Electronics
CHAPTER-1: An Introduction to Nanoscale CMOS Technology Transistor: A Future Perspective
Kumar Prasannajit. Pradhan
CHAPTER-2: High Performance Tunnel Field Effect Transistor (TFET) for Future Low Power Applications
Ribu Mathew, Ankur B, and Abhishek Kumar Upadhyay
CHAPTER-3: Ultra Low Power III-V Tunnel Field Effect Transistors
J. Ajayan and D. Nirmal
CHAPTER-4: Performance Analysis of Carbon Nanotube and Graphene Tunnel Field Effect Transistors
K. Ramkumar, Singh Rohitkumar Shailendra, V N Ramakrishnan
CHAPTER-5: Characterization of Silicon FinFETS Under Nanoscale Dimensions
Rock-Hyun Baek and Jun-Sik Yoon
CHAPTER-6: Germenium or SiGe FinFETs for Enhanced Performance in Low Power Applications
Nilesh Kumar Jaiswal and V. N. Ramakrishnan
CHAPTER-7: Switching Performance Analysis of III-V FinFETs
Arighna Basak, Arpan Deyasi, Kalyan Biswas, Angsuman Sarkar
CHAPTER-8: Negative Capacitance Field Effect Transistors to Address the Fundamental Limitations In Technology Scaling
Harsupreet Kaur
CHAPTER-9: Recent Trends in Compact Modeling of Negative Capacitance Field Effect Transistors
Shubham Tayal, Shiromani Balmukund Rahi,Jay Prakash Srivastava, Sandip Bhattacharya
CHAPTER-10: Fundamentals of 2D Materials
Ganesan Anushya, Rasu Ramachandran, Raj Sarika, Michael Benjamin
CHAPTER-11: Two-Dimensional Transition Metal Dichalcogenide (TMD) Materials In Field Effect Transistor (FET) Devices For Low Power Applications
R. Sridevi and J. Charles Pravin
Biography
D. Nirmal is presently working as an Associate Professor and Head in the Department of Electronics and Communication engineering. His research interests includes Nanoelectronics, 1D/2D Materials, Carbon nanotubes, GaN Technology, Device and Circuit Simulation – GSL, Sensors, Nanoscale device design and modelling.
J. Ajayan is an Associate Professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits and photovoltaics.
Patrick Fay is currently a Professor with the Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA. He established the High Speed Circuits and Devices Laboratory, Notre Dame, and oversaw the design, construction, and commissioning of the 9000-ft2 class 100 cleanroom housed in Stinson-Remick Hall at Notre Dame. He has served as the Director of this facility since 2003.
