1st Edition

Spacer Engineered FinFET Architectures
High-Performance Digital Circuit Applications

ISBN 9781498783590
Published June 6, 2017 by CRC Press
154 Pages 39 Color & 49 B/W Illustrations

USD $160.00

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Book Description

This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

Table of Contents


About the Authors


Chapter 1 ◾ Introduction to Nanoelectronics

Chapter 2 ◾ Tri-Gate FinFET Technology and Its Advancement

Chapter 3 ◾ Dual-k Spacer Device Architecture and Its Electrostatics

Chapter 4 ◾ Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design

Chapter 5 ◾ Design Metric Improvement of a Dual-k–Based SRAM Cell

Chapter 6 ◾ Statistical Variability and Sensitivity Analysis



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