CMOS Nanoelectronics: Innovative Devices, Architectures, and Applications, 1st Edition (Hardback) book cover

CMOS Nanoelectronics

Innovative Devices, Architectures, and Applications, 1st Edition

Edited by Nadine Collaert

Pan Stanford

438 pages | 25 Color Illus. | 211 B/W Illus.

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Hardback: 9789814364027
pub: 2012-09-19
eBook (VitalSource) : 9780429112836
pub: 2012-09-19
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This book covers one of the most important device architectures that have been widely researched to extend the transistor scaling: FinFET. Starting with theory, the book discusses the advantages and the integration challenges of this device architecture. It addresses in detail the topics such as high-density fin patterning, gate stack design, and source/drain engineering, which have been considered challenges for the integration of FinFETs. The book also addresses circuit-related aspects, including the impact of variability on SRAM design, ESD design, and high-T operation. It discusses a new device concept: the junctionless nanowire FET.


"This is a comprehensive book, and very timely and useful, too. FinFETs were once viewed as an exotic idea, but they are now a reality. What's more, they are being produced on a wide scale. Device engineers and circuit designers will be very happy to have this."

—Prof. Max Lemme - KTH Royal Institute of Technology, Sweden

"Multigate devices have made significant breakthroughs in recent years, and are likely to be the basis of a multitude of advanced device applications for some time to come. This book provides an excellent foundation of knowledge, as well as a critical analysis, spanning state-of-the-art process technology, electrical device behaviour, and circuit associated issues. It certainly would be a valuable resource to any researcher or student intending to work in the field of multigate devices."

—Prof. Ray Duffy - University College Cork, Ireland

"This book covers almost all the aspects of device and circuit technologies of FinFETs, from the device concept, device fabrication and characterization to circuit issues. It is quite unique that such a wide range of FinFET technologies are systematically described in one book. When considering that FinFETs have just come to be a mainstream device structure among CMOS devices, the publication of this book is very timely. Thus, this book will be a good reference for engineers and students who are interested in recent advanced CMOS devices and circuits."

—Prof. Shinichi Takagi - University of Tokyo, Japan

"This unique and timely book provides an extensive and detailed description of the many key novelties and challenges behind the development of finFET and multigate transistor architectures, whose advent is projecting CMOS technology from the era of happy scaling into the exciting realm of true nanoelectronics. Technology, performance boosters, process integration, device design and circuit design issues are examined in a careful and balanced sequence of chapters authored by top experts in multigate transistor research. Dedicated contributions address advanced topics in finFET metrology, characterization and modeling, and explore the potentials for a future evolution of nanoelectronics toward nanowire type devices. Reading this book is highly recommended to scientists and engineers interested in a comprehensive knowledge of the revolutionary innovations being introduced with the advent of multigate devices."

— Prof. Luca Selmi - Università degli Studi di Udine, Italy

"This book concentrates on 10 years of cutting-edge research on finFETs. With state-of-the-art publications as backbone, it develops the specifics of advanced devices in prospects as varied as technology scaling, ESD protection, high-temperature operation, device variability and modeling. At a time when trigate architecture is receiving increasing attention, I expect this book will soon become a reference in the rapidly expanding multigate community."

— Prof. Emmanuel Augendre - CEA-LETI, France

Table of Contents

General Introduction

Part 1: Integration of Multigate Devices (FinFET)

Introduction to Multigate Devices and Integration Challenges

Patterning Requirements for Multigate Devices

Gate Stack Design

Source/Drain Design: Reduction of Parasitic Resistance

Part 2: Circuit-Related Aspects

Variability and Its Implications for FinFET SRAM

High T Performance of FinFET

ESD and Multigate Devices

Part 3: Beyond FinFET

The Junctionless Nanowire Transistor

Transport in Nanostructures

Transport Spectroscopy of a Single Dopant in a Gated Silicon Nanowire

Thermionic Theory as a Tool for the Study of Transport in Doped and Undoped Si n-FINFETs Scaled Up to the Full Body Inversion Limit

About the Editor

Nadine Collaert received her MS and PhD degrees in electrical engineering from the ESAT Department, Catholic University Leuven, Leuven, Belgium, in 1995 and 2000, respectively, where her PhD thesis was related to the modeling and characterization of a new transistor concept, the vertical Si/SiGe heterojunction MOSFET. She works as a senior researcher with IMEC, Leuven. She has been involved in the theory, design, and technology of FinFET-based multigate devices and emerging memory devices. Her current research interests include the design and integration of biosensors, transducers, and actuators and the integration and characterization of biocompatible materials, e.g., carbon-based materials. She has authored and coauthored more than 230 papers in international journals and conference proceedings.

Subject Categories

BISAC Subject Codes/Headings:
MEDICAL / Biotechnology